"It was a wonderful experience interacting with you and appreciate the way you have planned and executed the whole publication process within the agreed timelines.”
Subrat SaurabhAuthor of Kuch Woh Pal
SystemVerilog, standardized as IEEE 1800, is a hardware description and hardware verification language used to model, design, simulate, test and implement electronic systems.
Basavaraj Hakari
MR Basavaraj Hakari is VLSI Frontend Design Verification Engineer and Verification Architect and Working in VLSI domain more than 16 years in the field of Frontend Verification of complex SOC and IP.
He is holding B.E (E &C) and MTech in VLSI & Embedded system from VTU BELGAUM Karnataka India.
